1 . Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and a fabrication method thereof, and particularly, to an LCD device using an amorphous zinc oxide-based semiconductor as an active layer and a fabrication method thereof.
2 . Description of the Related Art
Recently, as information displaying becomes more attractive and demands on the use of portable information media increase, researches and commercialization of light and thin flat panel displays (FPDs), which substitute cathode ray tubes (CRTs) as the existing display devices, have been broadly increased. Especially, among the FPDs, liquid crystal display (LCD) devices are to display images by using optical anisotropic property of liquid crystal. The LCD devices exhibit excellent resolution, color rendering property, image quality and the like, so they are widely applied to laptop computers, desktop monitors and the like.
The LCD device includes a color filter substrate, an array substrate, and a liquid crystal layer interposed between the color filter substrate and the array substrate.
An active matrix (AM) driving method, which is commonly used for the LCD device, is a method in which liquid crystal molecules in a pixel part are driven by using amorphous silicon thin film transistors (a-Si TFTs) as switching devices.
Hereinafter, a structure of a related art LCD device will be described in detail with reference to FIG. 1.
FIG. 1 is a disassembled perspective view schematically showing a related art LCD device.
As shown in FIG. 1, the LCD device includes a color filter substrate 5, an array substrate 10, and a liquid crystal layer 30 interposed between the color filter substrate 5 and the array substrate 10.
The color filter substrate 5 is provided with a color filter C having a plurality of sub color filters 7 for rendering red (R), green (G) and blue (B) colors, a black matrix 6 for dividing between adjacent sub color filters 7 and blocking light transmission through the liquid crystal layer 30, and a transparent common electrode 8 for applying a voltage to the liquid crystal layer 30.
Also, the array substrate 10 is provided with a plurality of gate lines 16 and data lines 17 arranged horizontally and vertically for defining a plurality of pixel regions P, thin film transistors T as switching devices formed at intersections between the gate lines 16 and the data lines 17, and pixel electrodes 18 formed on the respective pixel regions P.
The color filter substrate 5 and the array substrate 10 having such structure are attached in a facing manner by a sealant (not shown) formed at an edge of an image display region, thereby constituting an LC panel. The attachment between the color filter substrate 5 and the array substrate 10 may be implemented by an attachment key (not shown) formed either at the color filter substrate 5 or at the array substrate 10.
The amorphous silicon thin film transistor used for the above-described LCD may be fabricated in a low temperature process, but its mobility is small and does not satisfy constant current bias conditions. Meanwhile, a polycrystalline silicon thin film transistor has high mobility and satisfies the constant current bias conditions, but it is difficult to secure uniform characteristics, so it is difficult to increase in area and a high temperature process is required.
Thus, an oxide semiconductor thin film transistor including an active layer as oxide semiconductor has been developed, but application of the oxide semiconductor to the thin film transistor of the bottom gate structure causes degeneration of the oxide semiconductor during an etching process of source and drain electrodes.
FIG. 2 is a sectional view schematically showing the structure of a related art oxide thin film transistor.
As illustrated, in the related art oxide TFT structure, a gate electrode 21 and a gate insulating layer 15a are formed on the substrate 10, and an active layer 24 formed of oxide semiconductor is formed on the gate insulating layer 15a. 
Thereafter, source and drain electrodes 22 and 23, which electrically contact with source and drain regions of the active layer 24, are formed on the active layer 24, and at this time, in the process of depositing and etching the source and drain electrodes 22 and 23, the lower active layer 24 (in particular, a channel region A of the active layer 24) is possibly damaged to be degenerated, deteriorating the reliability of the device.
Namely, metals for source and drain electrodes are restrained to molybdenum based metals in consideration of contact resistance with oxide semiconductor. When the source and drain electrodes are formed according to a wet etching, the active layer is lost or damaged due to the physical properties of the oxide semiconductor which is weak to an etchant. Also, even when the source and drain electrodes are formed according to a dry etching, back sputtering or oxygen deficiency of the oxide semiconductor causes the active layer to be degenerated.
As such, since the oxide semiconductor has a weak coupling structure, in order to prevent damages on the back channel region due to the succeeding processes after deposition of the oxide semiconductor, an etch stopper may further be formed on the active layer as a barrier layer. However, for the oxide semiconductor, there is no consideration of preventing deterioration of device characteristics due to processes excluding a dry etching, namely, due to stripping or other environmental exposures.
Also, on the region where the gate line and the data line intersect each other, the gate insulation layer is deposited thinner on an upper portion of the gate line than on a side surface of the gate line, thereby generating a stepped portion, resulting in occurrence of a defect, such as a short-circuit between the gate line and the data line, on the side surface of the gate line.